The demand for high-performance processing devices requires that state-of-the-art integrated circuits perform operations in the minimum amount of time, consume the minimum amount of power, and occupy the smallest amount of die space possible. This is particularly true of a wide array of embedded processing systems, such as application-specific integrated circuit (ASIC) devices, that contain a processor and memory. ASIC devices and other embedded processing systems are used in network cards, modems, wireless receivers and transmitters, smart cards, cell phones, personal digital assistant (PDA) devices, and the like.
In normal software development efforts for an embedded processing system, a compiler is used to generate the appropriate object code from the source code that the programmer has written. In general, conventional compiler technology has evolved to allow the user to select the quality of the code that is generated (e.g., compilers have compilation switches that allow either independent or linked optimization of the code for space and time). Generally, object code that is optimized for space (i.e., low memory requirements) runs slower than object code that has been optimized for time (i.e., can use as much memory as necessary).
Circuit designers frequently make trade-offs when designing embedded processing systems. One major issue that must be resolved when designing an ASIC device or other embedded processing system is the amount of embedded memory that will be available in the system. Because a memory circuit can be expensive in terms of space, power consumption, and speed, it is important to optimize the embedded memory to minimize these costs while retaining as much flexibility as possible.
Several different types of memories may be used in modern embedded ASIC devices. These memories include SRAM, DRAM, flash RAM, EEPROM, flip-flops, and ROM. Each of these memories has different characteristics that make the memory more suitable or less suitable for a particular application. Unfortunately, while modern design tools, such as compilers and debuggers, are capable of telling circuit designers the total amount of memory needed, they tell very little else about the memory requirements of an ASIC device. The software designers who write the code executed by the ASIC device tend to treat all memory the same and do not write code in a manner that exploits the characteristics of different types of memories. The end result is that many ASIC devices run slower, consume more power, or are larger in size than would otherwise have been necessary.
Therefore, there is a need in the art for improved apparatuses and methods for designing embedded processing systems. In particular, there is a need for embedded processing system design tools that are capable of determining the memory access usage of an application executed by an embedded processing system that is under design. More particularly, there is a need for embedded processing system design tools that are capable of selecting and optimizing the types and sizes of memories used in the target device and optimizing the application program code executed by the target device to exploit the characteristics of the different types of available memories.